naja-scope MCP server

naja-scope is a helper that lets your AI assistant look inside a chip design written in SystemVerilog or Verilog. Instead of pasting thousands of lines of code into the chat, you ask questions and the AI answers with exact file and line references. It is handy for hardware engineers and anyone who reads or reviews chip designs.

What this MCP server does

You ask your AI a question about your chip design, like what drives a certain signal. The AI passes that question to naja-scope. naja-scope uses the najaeda engine to look through the elaborated design and find the answer. It sends back a small, exact result with file and line references. Your AI then explains it to you in the chat.

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What you can do with it

• Trace what drives or loads any signal across module boundaries
• Walk the module hierarchy and list instances and ports
• Jump to the exact SystemVerilog lines behind any object
• Get a module card with ports, counts, clock and reset
• Trace fan-in and fan-out logic cones up to the register boundary
• Recover state-machine names, struct fields and parameter formulas
• Explore gate-level netlists loaded with a Liberty library

Try asking your AI

• “Load my UART design from rtl/uart.sv with top uart_top, then show me everything that drives tx_o.”
• “What is inside the module ex_stage_i?”
• “Where does the signal data_out come from in my design?”
• “Load the Liberty library pdk/stdcells.lib and the gate netlist build/top.v, then tell me what cells top is built from.”

What it gives back to you

You get short answers in the chat, like a list of signals, a module summary, or the exact lines of code behind an object. Every answer comes with file and line ranges so you can check it yourself. Large results are cut into pages or shortened with clear markers, so your chat stays readable.

Before you start

Who it's for

Hardware engineers, verification engineers and anyone who reads or reviews SystemVerilog or Verilog chip designs.